- The optoelectronic
data sorter This
technology demonstrator aims at parallel sorting of thousand-word sets of
data. It comprises two hybrid chips (InGaAs/GaAs opto chips flip-chip mounted,
using the solder-bump technique, onto silicon CMOS integrated circuits)
into which data can be clocked electrically. Once loaded, the data are processed
in parallel using a free-space optical interconnect between the two chips,
which implements a perfect shuffle connection on each cycle. The system
is compatible with completing a full sort of 1024, 16 bit words in 16 microseconds.
The total input/output data rates going between the two hybrid chips corresponds
to 200 Gbit/s.
